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B.TECH 5th sem Fundamentals of CMOS VLSI paper 2016

UniversityVTU, Belgaum, Karnataka
CourseB.TECH
Semester5
SubjectFundamentals of CMOS VLSI
Year2016
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Heman Sharma
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Discuss latch-up in a p-well CMOS structure and its remedies. With neat figure explain twin tub CMOS process steps. 

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For an NMOSFET, the following details are available n = 500cm2/V-se, (Va - Vin) = 2.6V tox = 100 Å. Calculate Rn of the device if w 100m L = 0.5

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Deduce an equation for figure of merit of MOS transistor. Fnd the operating frequency fo in the following condition  = 125cm2/v-sec, L=2 m, Vgs = 2V and What  = IV.

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What are the uses of stick diagram? Give the table of color and monochrome stick encoding for simple single metal NMOS process. 

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Draw the CMOS circuit diagram, stick diagram and symbolic diagram of Boolean function F= 

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What do you mean by  based design rule? Explain  based design rules applicable to MOS layers and transistors. 

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With neat circuit diagram explain :

(i) A simple BiCMOS inverter 

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With neat circuit diagram explain :

(ii) An improved BiCMOS inverter with no static current flow and better output logic levels.

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Draw and explain the basic structure of dynamic CMOS logic and discuss the charging sharing problem in this structure.

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What are the most commonly used scaling models? Provide scaling factors for

(i) power dissipation per gate

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What are the most commonly used scaling models? Provide scaling factors for

(ii) Gate delay

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What are the most commonly used scaling models? Provide scaling factors for

(iii) current density and

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What are the most commonly used scaling models? Provide scaling factors for

(iv) speed power product

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 For the given multilayer structure shown in Fig. 04(b) calculate the total capacitance.

 

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Obtain switch logic arrangements for (1) Vout - V1A + V2B + V3C using 3 way selector switch and (ii) 3 input nMOS OR gate.

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Draw and explain 4 : 1 MUX using transmission gate.

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Explain with neat figure, non-inverting dynamic storage cells using CMOS transmission gate switch.

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With the help of logic expressions explain how to implement arithmetic logio operations with a standard adder. 

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Explain with neat diagram the 4x4 cross bar switch.

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With neat figure explain transistor dynamic RAM cell.

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Describe the CMOS pseudo static memory cell with neat figure.

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Explain read and write operations in dynamic memory cell.

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Write short note on :

i) Input/output pads 

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Write short note on :

ii) Test and Testability.

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Write short note on :

iii) Level sensitive scan design and

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Write short note on :

iv) Built in self test (BIST)

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