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(b) Design a MOD-8 down asynchronous counter.

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(e) What are the moore and melay machines? Compare them.

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(e) What is the difference between conventional flow chart and ASM chart?

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(a) Distinguish Melay and Moore machining.

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(c). Convert the following binary number of decimal numbers:

         (i) (101111.1101)2            (ii) (110101.101)2. 

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(b) State and prove the demorgan theorem.

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(a) What are universal gates? Design AND and OR gates using the universal gates.

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(b) Simply 

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(a) What is Gray Code? Why is it important?

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(f). What are salient features of ASM charts

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(f) What are capabilities and limitations of finite state machines?

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(b) Convert (A6BF5)16 is to binary.

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(a) Convert (444.456)10 to an octal number,

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Write short note on:

(b) Homing experiments..

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Write short note on:

(a) Faults models for sequential circuits.

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For the state diagram of the control circuit in figure-I below. Obtain the ASM chart and design the circuit using multiplexers.

   

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Explain the procedure of state minimization using the merger graph and merger table. 

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Design a sequence detector that produces an output 'l' whenever the non overlapping sequence 1011 is detected.

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 (g) What is the advantages of Master Slave FF.

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(a) Simply the expression Y =  (0,1,4,5, 6, 8, 9, 12, 13, 14) using the K-map.

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(b) Find the minimal sum of products for the Boolean expression:

f(w,x,y,z) =   (1,3,4,5,9,10,11) + d 6,8) using the Quine-Mccluskey method.

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(a) Design a 4-Bit magnitude comparator.

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(b) Design and explain the octal to binary encoder.

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(a) Design and explain the operation of TTL NOR gate. 

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(b) What are the advantages of CMOS logic? Discuss.

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(a) Design a synchronous MOD-10 counter.

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(6) What are the different type of shift registers? Explain.

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Design a sequence detector that produces an output '1' whenever the non overlapping sequence 1011 is detected. 

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Draw the merger graph and obtain the set of maximal compatibles for theincompletely specified sequential machine whose state table is given below:

                     

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Write short note on:

(a) Homing experiment

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(b) Fault models

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For the state diagram of the control circuit shown below:

(b) Design the circuit using multiplexers.

   

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For the state diagram of the control circuit shown below:

(a) Obtain the ASM chart.

         

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Explain Capabilities and limitations of finite state machines. This question has 0 answers so far.
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Realize AND, OR and NOT gate using only NAND gate. This question has 0 answers so far.
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Determine the value of base x if (211)x=(152)s . This question has 0 answers so far.
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Determine the value of base x if (193)x=(623g This question has 0 answers so far.
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Differentiate between Moore and Mcaly machines. This question has 0 answers so far.
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What do you mean by Synchronous and Asynchronous circuits? This question has 0 answers so far.
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Implement a full subtractor using 8:1 Multiplexer. This question has 0 answers so far.
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Explain priority encoder. This question has 0 answers so far.
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Obtain the minimal expression using Quine-McCluskey Method F(A,B,C,D)-Em(1,5,6,12,13,14)+d(2.4) This question has 0 answers so far.
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What is Race-Around condition? And how is it overcome in JK Flip Flop.Explain with diagram. This question has 0 answers so far.
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Design a Mod-5 synchronous counter using JK flip flop. This question has 0 answers so far.
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Explain different kinds of faults encountered in digital circuits. This question has 0 answers so far.
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Explain Homing experiment in detail with example. This question has 0 answers so far.
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Convert JK flip flop to T flip flop. This question has 0 answers so far.
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Draw an ASM Chart for the synchronous circuit having following description: The circuit has control input C, clock and outputs x,y,z. If C=1, on every clock rising edge the code on outputs x,y,z changes from 000->010->100->110-000 and repeats. This question has 0 answers so far.
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Draw an ASM Chart for the synchronous circuit having following description: The circuit has control input C, clock and outputs x,y,z. If C=0, the circuit holds the present state. This question has 0 answers so far.
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Prove that (A+B'+AB) (A+B')(A'B)=0 This question has 0 answers so far.
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Design a 4 bit odd parity generator. This question has 0 answers so far.
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Explain look ahead carry adder. This question has 0 answers so far.
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Write short note on Partition Technique. This question has 0 answers so far.
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Write short note on TTL Logic Family. This question has 0 answers so far.
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Write short note on Shift Register. This question has 0 answers so far.
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c) Simply the expression y =  (3,4,5,7,9,13,14,15) using k-map method. 

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(d) Discuss types of shift registers.

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(g) What is PAL and PLA? Explain.

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(c) Describe the circuit and operation of single bit magnitude comparator.

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(a) Find the minimal sum of products for the Boolean expression f = (1,2,3,7,8,9,10,11,14,15). 

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(b) Design a 4-bit carry look ahead udder.

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(a) Explain, with the aid of circuit diagram, the operation of a TTL-3 input NAND gate.

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(b) What are the advantages of CMOS Logic.

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(a) Design a Delay Flip flop using S-R flip flop.

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