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a) Write a VHDL code for 4:1 Multiplexer.

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Explain the following:

b) PLA and PAL architecture

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Explain the following:

a) Architecture of CPLD

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b) Discuss and explain the various clock skew and timing consideration in clocked digital circuits.

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a) Explain the Hazards in combinational circuits and sequential circuits.

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b). Write the VHDL code for 4 bit PIPO shift register.

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a) Write a VHDL code for state machine to BCD to excess-3 codes Converter.

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b) Write the state table, state diagram and VHDL code for JK flip flop. 

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a) Describe the representation of synchronous sequential machine. Explain the Moore Model in detail. 

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b) Write VHDL code for BCD to seven segment decoder. 

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a) Write the VHDL description of the priority encoder.

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b) Write VHDL code for 3 to 8 decoder,

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(a) What is Package declaration and Package body? Explain it with example.

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b) Explain with example i) Process statement ii) Case statement

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a) Write a short note on structural style of modeling. 

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b) What is generic statement in VHDL? Discuss with examples .

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a) What What are the different data types in VHDL? Explain all types of data used in VHDL. 

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g) Discuss the difference between functions and procedures. Explain with suitable example.

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f) What is difference between inertial and transport delay? Given examples of each.

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f) What is difference between inertial and transport delay? Given examples of each.

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e) What is operator overloading concept? Explain with an example.


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d) What is difference between synchronous sequential circuit and Asynchronous sequential circuit?  

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c) Give comparison between PROM, PLA and PAL.

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b) Write the capabilities of VHDL.

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