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8

Why are NAND and NOR gates known as universal gates? Implement half adder circuit using NAND gates only.

This question has 2 answers so far.
3

Define the terms for digital circuits:

(i)Speed of operations,

(ii) Figure of Merit

(iii) Noise margin.

This question has 2 answers so far.
2

Implement the expression using a multiplexer


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2

Show state diagram of 3 bit up/down counter. Design 3 bit up/down counter using T flip-flop.

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1

Simply the expressions:

(a) 

This question has 1 answers so far.
1

What is the major disadvantage of SR flip-flop? How is this addressed in JK Fip-Flop ?

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1

Explain the term "logic family". Compare RTL and TTL logic. 

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1

Simplify the following expression using K-map:

Y=m0 + m1 + m3 + m7 + m8 + m9 + m11 + m15

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1

Prove the relationship:


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1

Explain

(a) J-K Flip-Flop can be converted to T Flip-Flop

(b) race around condition

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1

Justify the statement: "J-K Flip-Flop is a universal Flip-Flop".

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1

Explain the advantage of SIPO over SISO. Discuss their applications..

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1

Write short notes on any two of the following:

(i) RAM & ROM

(ii) PLA

(iii) Modulo counters

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1

Q1 Attempt any five questions: (a) Explain Parity Generation and checking process with example. (4)

(b) Explain Excess-3, BCD and gray codes. Convert binary 1101 to equivalent gray code and also convert Gray code 0111 to equivalent Binary code. (4)

(c) Perform the following conversions: (3) (i) (A3.1 E) 16 = 10 (ii) (532.03)s = ( )16

(d) Define fan-in, fan-out, propagation delay, noise margin and voltage parameters. (3)

(e) What is a D flip flop? Show how SR flip flop can be converted to D flip flop? (3)

(f) Explain the working of Serial in Serial Out shift right register.(4)

(g) What is binary multiplier? Discuss the multiplier using shift method. (4)

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1

Q2 (a) Design the circuit of the Boolean Equation:  Y =(A+B (A+C+D (A+B+CB using only NOR GATES.

(b) Why NAND & NOR Gates are called Universal Gates? How an AND Gate can be implemented using only NOR Gates?

(c) Implement Ex-OR using NAND gates only. 

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0

(a) Write the truth table for following logic function:

(i) F=

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0

(a) Write the truth table for following logic function:

(ii) F= M. N + M'N'P'

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0

(b) Find sum-of-products expression for each of the following:

(i) F= x,y,z (1,3,5,6,7) 

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0

(b) Find sum-of-products expression for each of the following:

   ii) F = A,B,C,D (4,5,6, 13, 15)

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0

(c) Design a full adder, write Truth table and solve their Boolean equation

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0

(a) Design a Binary-to-Gray Code converter.

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0

(b) Design a decoder circuit for seven segment display system.

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0

(c) Design a 4:1 MUX using logic gates.

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0

(a) Discuss the architecture of PAL.

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0

(b) Explain various flip flops with the truth table and circuit diagram.

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0

(a) What is race around condition? Explain.

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0

(b) Design and explain serial-in serial-out shift Register using D-FF.

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0

(a) Design a 4 bit Asynchronous Binary Counter. Explain it.

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0

(b) Design and explain Johnson Counter.

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0

(a) Draw the inter diagram of 555 timer. Explain in detail.

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0

(b) Design a Actable multivibrator using 555 timer.

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0

(c) Explain Resister weighted ADC.

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0

(a) Explain organization & operation of RAM.

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0

(b) Explain TTL logic.

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0

(c) Discuss Propagation delay, setup and hold time.

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0

Write short note on:

(a) CMOS

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0

Write short note on:

(b) ECL 

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0

Write short note on:

(C) R-2R Ladder DAC.

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0

Attempt any five from the following:-

(a) Design fuil subtractar circuit using NAND gate only..

b) Explain how transistor as a switch works? Give its use in logic circuits.

(c) Define Can-int, fan-out, propagation delay, noise margin and voltage parameters

(d) Explain decoder and demultiplexer. Give their applications.

(e) State the De Morgan's theorem and prove them with an example.

(f) Define synchronous and asynchronous counters with their merit and demerits.

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0

(b) Explain the operation and advantages of CMOS.

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0

(c) Prove 

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0

(a) Design a conbinational circuit whose input is three bit number and whose output is equal to square of input and implement it using basic gates. 

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0

(b) Explain briefly the BCD to seven segment decoder.

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0

a) Design a full adder circuit using Multiplexer.

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0

(b) Implement the Ex-OR gate equation with NAND gates only.

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0

(a) Draw the logic diagram of parity checker and generator/checker. Explain its operation with the help of truth table.

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0

(b) Design a binary multiplier for following A=1011, B=111

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0

(a) Define edge triggering in flip flops. Explain Master slave JK Flip-flop that solves the problem.of Race-around condition, with diagram.

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0

(b) Design JK flip-flop using SR flip-flop.

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0

(a) Explain the bidirectional shift register with diagram, truth table and clock pulse. Give their applications. 

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0

(b) Differentiate Static RAM and Dynamic RAM.

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0

(a) Design Modulo 7 counters with truth table and logic diagram.

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0

(b) Give the application of PLA and PLD.

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0

(a) Design a combinational circuit with PLA, having three inputs, four product terms and     two outputs:

    F1 (A,B,C)=(3,5,6,7)                      F2(A,B,C)=  (0,2,4,7)

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0

(b) Explain Johnson's counter with truth table and clock pulses.

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0

(a) Simplify the Boolean function F together with the don't care conditions 'D' in 9 (i) Sum of products and (ii) Product of Sums

  

  


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0

(b) Construct truth table of a BCD to, 7 segment decoder with active low outputs. 

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0

(a) Design a four-bit magnitude comparator using logic gate.

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0

(b) Implement the Boolean function f(A,B,C,D)=IIM(1,4,5,7,10,11,13,14) using 4:1 multiplexer with active-high outputs.

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0

(a) What is the use of the present and clear inputs in D Flip Flop. Design a Master Slave flip-flop with a NAND gates.

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0

(b) Implement the following function using only NOR gates having a maximum fan-in of three:-

 

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0

(a) Design a multiplexer based logic circuit for a karnaugh map of three variables in which the even maxterms are Os.

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0

(b) Simplify the logic diagram shown below

           

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0

A sequential circuit has two JK flip-flops, A and B two inputs x & y and one output, z. The flip flop input functions and the circuit output functions are as follows:     

(a) Draw the logic diagram of the circuit.

(b) Tabulate the state table

(c) Derive the next-state equations for A and B.

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0

(a) With the help of neat sketches, explain the operation of a MOS static RAM cell and a DRAM cell.

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0

(b) Briefly describe propagation delay, Power dissipation, speed-power product, fanin and     noise margin parameters in logic families.

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0

(a) Implement a 4K x8 bit RAM using 1Kx4 RAM chips. Use minimum no.of other IC chips. 

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0

(b) Explain the operation of a twisted ring and ring counters and give their state diagram. 

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0

(a) Design a binary ripple counter that counts 000 and 111 and skips the remaining six states that is .0001, 010, 011, 100, 101 and 110. Use presentable, clearable negative edge-triggered J-K flip flops with active low present and clear inputs. Also determine the frequency of different flip flop outputs for a given clock frequency, fc. 

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0

(b) Implement BCD to excess 3 code converter using PLA.

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0

(a) Find the value of x when (292)10=(1204)x .

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0

(b) Prove that on AND-OR configuration is equivalent to a NAND-NAND configuration.

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0

(c) Explain the operation of an edge-triggered D-type flip-flop.

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0

(d) Implement EXOR gate using Minimum number of NAND gates.

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0

(e) Reduce the Boolean Expression

  

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0

(f) Use 2's complement to perform M-N with given binary Nos.

     M=11010            N=1101

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0

(g) Differentiate between Racing and Toggling in Flip flops.

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0

(h) What is the difference between Asynchronous and synchronous sequential circuits. 

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0

(i) Explain the working of Universal shift register.

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0

(j) Obtain a 16:1 multiplexer using two 8:1 multiplexers, one inverter and one two input OR gate.

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0

What is De-multiplexer? Explain the difference between MUX and DEMUX.

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0

Explain ripple counter. What's the difference between ripple counter and synchronous counter?

This question has 1 answers so far.
0

Explain deMorgan's theorem. Prove the following using De Morgan's theorem:


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0

Implement EX-OR and EX-NOR gate using only NOR gates. 

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0

Explain even parity and odd parity. Design a circuit for even parity generator for 3-bit message.

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0

Show block diagram of a 3 bit parallel binary adder.

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0

Explain the binary multiplication method using the example (1010x1011)

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0

Design a 3:8 decoder using basic logic gates

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0

Design a S-R latch using 2-input NOR gates

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0

Explain master-slave flip-flop

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0

Explain the advantage of SIPO over SISO. Discuss their applications.

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0

Explain the advantage of SIPO over SISO. Discuss their applications..

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0

Explain the advantage of SIPO over SISO. Discuss their applications.

This question has 0 answers so far.
0

Explain the advantage of SIPO over SISO. Discuss their applications.

This question has 0 answers so far.
0

Explain the advantage of SIPO over SISO. Discuss their applications..

This question has 0 answers so far.
0

Explain the advantage of SIPO over SISO. Discuss their applications.

This question has 0 answers so far.
0

Explain the advantage of SIPO over SISO. Discuss their applications..

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0

What is Bi-directional Flip-Flop?

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0

How ripple counter works?

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0

How ripple counter works?

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0

Define ring counter.

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