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a) Design a synchronous 3-bit updown counter using J-K flip flops. 

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(b) Draw the logic diagram or POS

Y = (x1+x2) (x2+x3)

Show the presence of hazard, its type and a way of removal. 

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(a) Write VHDL code for 4 bit asynchronous counter.

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(c) Explain different types of standard logic.

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(b) Explain the difference between concurrent and sequential signal assignment.

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(a) Explain Generate statement with an example.

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(b) Explain inertial and transport delay using example.

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(a) Write down VHDL code for full adder using structural modeling.

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5. Write short note on:

b) SRAM and DRAM

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5. Write short note on:

a) CMOS Logic 

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b) Explain the working of flash type ADC. 

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(a) Write a test bench and VHDL code for 2 bit multiplier.

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b) Draw the circuit diagram of master slave J-K flip flop and explain its operation with the help of truth table. 

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a) Give the comparison between PROM, PLA and PAL. 

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b) Write short note on BCD to 7 segment decoder. 

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a) With the help of a logic diagram and truth table explain an octal to binary encoder. 

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b) Implement the following function with a MUX F(a,b,c)=m(1,3,5,6) Take 'a' and 'b' as select inputs. 

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a) Draw the logic diagram of 4-bit binary parallel adder and explain operation. 

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b)Make a k-map of the following expression and obtain the minimal of SOP and POS forms 


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a) Reduce the following expression using k-map and implement the minimal expression in universal logic.

F=m(0,2,4,6,7,8,10,12,13,15)

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b) Draw the logic diagram using only two input NAND gates to implement the following expression.

              

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a) Reduce the expression

  


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c) Explain critical and non-critical race.

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Write VHDL code for

(c) Serial in parallel out shift register.

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Write VHDL code for

(b) 4x16 decoder

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Write VHDL code for

(a) SR flip flop

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j) What is signature?

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(i) Define test bench.

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(h) What is overloading in VHDL?

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(g) What are the capabilities of VHDL?

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(f) What are ASM charts?

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(e) How does a PLA differ from PAL?

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(d) Give difference between Mealy and Moore model.

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f) Write the different application of 555 timer. 

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(b) Define wait statement.

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(a) What are generics?

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(b) What is altera's cyclone processor? Explain using any example.

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(a) Define FPGA and its use in industry.

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(b) Describe block diagram of any Xilinx series.

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(a) Define CPLD and give its applications.

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(b) Draw state machine model for the sequence 1010 and write VHDL code for that.

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(a) Which command is used for dumping results into a text file? Explain with example. 

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(b) What are pure and impure functions? Give difference between functions and procedures.

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Simplify the following Boolean expression using Karnaugh maps: F(A,B,C,D) = {(3, 7, 11, 13, 14, 15). This question has 0 answers so far.
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Compare Linear-ramp ADC and Dual-slope ADC. This question has 0 answers so far.
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Describe the functioning of R-2R Ladder D/A Converter. This question has 0 answers so far.
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Draw the state diagram for sequence detector of D flip-flop. This question has 0 answers so far.
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Compare flip-flop excitation table and characteristics table. Draw the flip-flop excitation table of RS flip-flop. This question has 0 answers so far.
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Draw the logic diagram of a four-bit binary ripple countdown counter using flip-flops that trigger on the positive edge of the clock. This question has 0 answers so far.
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Explain the features of Monostable Multivibrator. This question has 0 answers so far.
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Design a four-bit binary synchronous counter using D flip-flops. This question has 0 answers so far.
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Explain race-around condition in JK flip flop. Draw the sequential circuit of JK flip flop and give its state table. This question has 0 answers so far.
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Give the illustration of BCD-to Decimal Decoder. This question has 0 answers so far.
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Draw the block diagram of a 4-to 1-line multiplexer. Explain its operations by means of a function table. This question has 0 answers so far.
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Explain three different types of output configurations in TTL gates. This question has 0 answers so far.
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Construct a 4-to-16-line decoder using five 2-to-4-line decoders with enable. This question has 0 answers so far.
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Explain AND-OR-INVERT implementation with an illustration. This question has 0 answers so far.
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Draw the circuit diagram and truth table of full adder. This question has 0 answers so far.
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Explain the role of 555 timer and its application as as table multi-vibrator. This question has 0 answers so far.
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Draw the circuit of full subtractor. This question has 0 answers so far.
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Give an illustration of comparator. This question has 0 answers so far.
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Mention the features of configurable Programmable Array Logic. This question has 0 answers so far.
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Explain bipolar transistor characteristics. This question has 0 answers so far.
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Explain various types of ROMs. This question has 0 answers so far.
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Give the block diagram and timing diagram of serial transfer from register A to register B. This question has 0 answers so far.
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Explain the functioning of Programmable Logic Array AND matrix and OR matrix This question has 0 answers so far.
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e) Compare between combinational and sequential circuits.

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d) Design a 32:1 multiplexer using 16:1 mux and 2:1 multiplexer.



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c) Show that NAND and NOR gates are universal gates.



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b) What are asynchronous sequential circuits?


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a) What are analog circuits? Give a few examples.

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Compare PAL and PLA. This question has 0 answers so far.
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Draw PLA circuit to implement the functions: F2 = (AC + AB + BC)' This question has 0 answers so far.
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Draw PLA circuit to implement the functions: F1 = A'B + AC' + A'BC' This question has 0 answers so far.
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Explain the functioning of Programmable Logic Array Expanding PLA capacity. This question has 0 answers so far.
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Explain the functioning of Programmable Logic Array Output through FLIP-FIOPs and Buffers. This question has 0 answers so far.
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Explain the functioning of Binary-weighed DAC using a neat diagram. This question has 0 answers so far.
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How many lines must be decoded for the chip select inputs?Specify the size of the decoder. This question has 0 answers so far.
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How many lines of the address must be used to access 256 K bytes? How many of these lines are connected to the address input of all chips? This question has 0 answers so far.
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How many 32 K X 8 RAM chips are needed to provide a memory capacity of 256 K bytes? This question has 0 answers so far.
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Explain the functional aspects of content addressable memory. This question has 0 answers so far.
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Explain the Mode of memory access. This question has 0 answers so far.
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Explain the Physical characteristics of memory. This question has 0 answers so far.
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Explain the operational Diode Transistor Logic (DTL) using NAND Gate. Derive the expression for propagation delay. This question has 0 answers so far.
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Give an example to illustrate binary-weighted DAC. This question has 0 answers so far.
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Explain CMOS characteristics. This question has 0 answers so far.