Computer Organization

b. List out widely used bus standards in a computer system. Further, explain the READ operation using PCI bus with a timing diagram.

b. Briefly explain SISD and SIMD architectures with neat diagrams.

a. Explain any two shared memory multiprocessor models.

c. Bring out the differences between micro programmed control and Hard-Wired control.

b. With a block diagram, describe the organization of a micro programmed control unit.

a. Write the sequence of control steps to execute the instruction, ADD (R), R, on single bus architecture.

c. Perform the division of number 8 by 3 (8 + 3) using restoring division method.

b. Multiply (+14) and (-6) using Booth's algorithm.

a. Explain the design of a 4-bit carry-look ahead adder.

b. What is a virtual memory? With a neat diagram, explain the method for translating virtual address to physical address. 

a. What is a cache? Explain any two cache mapping functions with neat sketches.

a. List the steps needed to execute the machine instruction given below in terms of transfers between the components of processor, memory and some control commands. ADD LOCA, RO. Assume the instruction is stored in memory location 'INSTR'. 

a. With a block diagrams, explain a general 8-bit parallel interface.

c. What is bus arbitration? with a neat diagram, explain any one approach used for bus arbitration.

b. With neat sketches explain a method for handling interrupts from multiple devices.

a. Define interrupt. What are the overheads incurred in handling interrupts?

c. Explain in detail encoding of machine instructions into 32-bit words. Assume that there are 16 registers in the processor. 

b. What is subroutine linkage? With examples explain different ways of passing parameters to subroutine. 

a. Define addressing mode and explain any four addressing modes with an example for each.

c. Write the basic performance equation. Explain the role of each of the parameters in the equation on the performance of the computer. 

b. Perform the following operations on the 5-bit signed numbers using 2's complement representation system. Further indicate whether overflow has occurred:

i) (-10) + (-13)   ii)(-10)-(+4)    iii) (+7)-(-15)   iv) (+8) + (+10).